Journal
Scientific and technical journal «Priborostroenie»
UDK681.327
Issue:4 (57)
Download PDF379 Kbyte
TRANSACTION-LEVEL REAL-TIME CONSTRAINTS MONITOR FOR SYSTEM ON CHIP
Annotation
A method of the formal description of internal timing restrictions for computing systems at transaction level is proposed. The method is focused on reduction of hardware complexity of embedded monitoring and diagnostics tools. Based on the proposed approach, the timing restrictions hardware monitor for systems on chip (SoC) with bus-topology is designed, and results of its experimental implementation are presented.
Keywords
Постоянный URL
Articles in current issue
- EFFICIENCY OF FREQUENCY DOMAIN ALGORITHM OF DIGITAL IMAGE WATERMARKING BASED ON DISCRETE HADAMARD TRANSFORM
- A CONSISTENT MODEL OF MANDATORY ACCESS CONTROL
- A METHOD OF PROTECTION AGAINST DRIVE-BY DOWNLOAD ATTACKS
- WAYS FOR IMPROVING RECOGNITION ROBUSTNESS IN MULTIMODAL BIOMETRIC SYSTEMS
- TRANSFORMATION OF A NATURAL LANGUAGE TO RDF FORMAT USING SEMANTIC ANALYZERS OF TEXTUAL INFORMATION
- SERVICE QUALITY PARAMETERS OF ELECTRONIC INDUSTRY WEB SERVICES
- DESIGN OF SYSTEMS WITH PRIORITIES
- A METHOD FOR CALCULATION OF CHARACTERISTICS OF CLOSED DETERMINISTIC MODELS OF MULTI-SERVICE COMPUTER NETWORKS
- WAITING TIME IN FIFO-BASED MULTI-CLASS QUEUING SYSTEMS
- OPTIMIZATION OF QUERIES REDISTRIBUTION IN CLUSTERS AT CHANGING ACTIVITY OF THE QUERIES SOURCES
- ESTIMATION OF RELIABILITY OF EXECUTION OF REAL-TIME QUERIES
- RECONFIGURABLE EMBEDDED SYSTEMS AND SYSTEM-ON-CHIP
- APPLICATION OF MULTIVALUED LOGIC IN FUNCTIONAL CIRCUITS DEVELOPMENT
- METHODS AND MEANS FOR MONITORING OF RESPIRATION
- SEARCH FOR PROCEDURE WITH THE USE OF FUNCTIONAL PROGRAM TRANSITION GRAPH TO VERIFY COMPUTATIONAL PROCESSES
- QUASI-ABSOLUTE DIGITIZER OF CORNER ON THE BASE OF DUAL-TRACK RECURSIVE NONLINEAR CODE SCALE
- CODE SCALES ON THE BASE OF INVERSELY CONJUGATED BINARY SEQUENCES