Journal
Scientific and technical journal «Priborostroenie»
UDK681.3
Issue:3 (58)
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A new method of formal model generation for system on chip (SoC) real-time functioning is proposed. The model is generated by embedded means of SoC during field tests or end-user operation. The method can be used as a basis of the mechanism of SoC embedded runtime verification. In contrast to existing methods, requirements on instrumental memory size are decreased considerably.